RE: [MI400] LQ and SELRI PowerPC instruction questions

["Steve Richter" <srichter@xxxxxxxxxxxxx>]

-----Original Message-----
From: mi400-bounces@xxxxxxxxxxxx [mailto:mi400-bounces@xxxxxxxxxxxx]On
Behalf Of Gene_Gaunt@xxxxxxxxxxxxxxx
Sent: Monday, February 07, 2005 9:30 AM
To: MI Programming on the AS400 / iSeries
Subject: Re: [MI400] LQ and SELRI PowerPC instruction questions

>They appear to deal with an AS/400 extension to the powerPC 32-bit
>exception register: the sixteen AS/400 exception bits 32 through 47.

>LQ:  RT,DQ(RA),PT

>"PT" is an ORed mask of pointer type integrity checks to set AS/400
>exception bit 41:

>B'1000' = system pointer
>B'0100' = instruction pointer
>B'0010' = space pointer
>B'0001' = data pointer

bit 41 would be bit 1 of field 10 in the condition register.  Field 10 being
bits 40 - 43 of the condition register.  Notice how the PT operand is
expressed as 4 bits. Just like a condition register field is a 4 bit value.

-Steve