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Walden H. Leverich wrote:
I assume you mean you doubt the MI codes use the wrong instructions. I
doubt it too, but they why such a difference? I guess it's just a nature
of the beast given that the integer math is mostly shift and other
low-cycle (single-cycle) operations where the packed math is
multi-cycle. But I would have assumed that the built-in hardware was
optimized for just that purpose, almost an ASIC on a CPU. :)
Perhaps when the machine was moved from CISC to RISC, any CPU-level packed decimal opcodes were removed.

Joe

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