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Walden,
Sopport for BCD math instructions was exclusive to the mainframe until just recently. I have not seen any technical details since the relase of POWER6, but as I recall, the BCD math extensions we intended to be included in POWER6, to support the future convergence of the i, p, and z platforms. I'm not absolutely sure that this actually made it into the delivered P6 hardware.
Regardless, there has never (to my knowledge) been a hardware BCD processor in the i platform.... IBM optimized the system to prefer dealing with packed, but it is a software implementation....
Oh, here's an article about P6 DFP (decimal floating point)..
http://www.itjungle.com/tfh/tfh101606-story01.html
Eric
-----Original Message-----
From: rpg400-l-bounces@xxxxxxxxxxxx
[mailto:rpg400-l-bounces@xxxxxxxxxxxx]On Behalf Of Walden H. Leverich
Sent: Wednesday, May 07, 2008 11:05 AM
To: RPG programming on the AS400 / iSeries
Subject: RE: Integers outperform Packed in a big way
I'm actually somewhat surprised by that performance difference. I would
expect such a difference in x86 architecture with a BCD number (close
approx to packed) since there is no native math opcodes for BCD. Integer
math is chip-level where BCD-math is process-driven. But I _thought_ one
of the mainframe and i-specific things on the power chip was hardware
instructions for packed math. Is it possible that the MI math opcodes
don't generate the "correct" Power instructions?
-Walden
midrange.com
