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  3. September 2005

Re: Src B200-8105 on early i5s.

Vern,
You are correct and respectfully I disagree with Al. Having them different between FSP and SLIC is good.
P and T are the levels for the FSP code. P for permanent and T for temporary. Except for the 595 there is only one FSP in the system.
A and B are for OS/400 SLIC and are for each partition independantly. If you have no HMC then the MH ptfs that exist on your system are downloaded to the FSP at power down time. Normally the P and T sides of the FSP are kept in sync so long as all goes well. A and B SLIC are kept in sync only of you take the action of APYPTF *PERM. 

Hopefully that makes some sense!

  - Larry

Vernon Hamberg wrote:
A & B is not the same as T & P, right? The latter have to do with the service processor, A & B with load source, right? I just saw a display of what you get when running FLASHLEVELS in SST. There's a distinction there. We don't have an HMC, so we use the normal PTF process, but this is still a bit of a quandary for me. 

Vern

At 11:50 AM 9/9/2005, you wrote:

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