|
From: "jt" <jt@ee.net> > Question 1: > > I don't see the advantage to being able to slow down the chip... On the manufacturing end, you only want to design and build a few classes of chips. On the marketing end, you want to provide a wide range of CPW capacities. Solution: configurable chip speeds. Nathan M. Andelin www.relational-data.com
As an Amazon Associate we earn from qualifying purchases.
This mailing list archive is Copyright 1997-2024 by midrange.com and David Gibbs as a compilation work. Use of the archive is restricted to research of a business or technical nature. Any other uses are prohibited. Full details are available on our policy page. If you have questions about this, please contact [javascript protected email address].
Operating expenses for this site are earned using the Amazon Associate program and Google Adsense.