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The hardware page table is a table in memory where the hardware keeps
track of the pages of memory, and includes the storage protection bits
and the NEx bit.  You can see the table entry for a given virtual
address with STRSST like this:

Opt
 1 - Start a service tool
 4 - Display/Alter/Dump
 1 - Display/Alter storage
 2 - Licensed Internal Code (LIC) data
14 - Advanced analysis
select 1 ADDRESSINFO
enter a virtual address, like 1a76b86d3f000000
F10 to page right to see the NEx bit.

I don't think changing object type of a *usrspc to *pgm would have any
effect on the NEx bit.

I'm sure that to turn off the NEx bit would require running in
supervisor state (not just system state) which only the OS and Leif do.

--Dave

Steve Richter wrote:

-----Original Message-----
From: mi400-bounces@xxxxxxxxxxxx [mailto:mi400-bounces@xxxxxxxxxxxx]On
Behalf Of Dave McKenzie
Sent: Wednesday, February 15, 2006 10:25 AM
To: MI Programming on the AS400 / iSeries
Subject: Re: [MI400] Patched Programs - Yet another spin


The trick of putting PowerPC instructions in a user space won't work
anymore because there's a new bit in the hardware page tables (new in
V5R3) called "Nex," which I think stands for "No execute."  The bit is 1
for user spaces, meaning that code in a user space can't be executed.

that's no fun!

What is the hardware page table?  Can the patched code in the RPG program
first change the object type and sub type of the user space to *PGM?  Kind
of as a boot strap type process where you are coding a permanent user space
executable that can turn off the NEX bit in other hardware page table
entries.

-Steve




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