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But the tag is not loaded from memory by a separate instruction , is it ? (Say, load pointre, then load tag, then test tag). Hardware loads tag into condition register when pointer is loaded. I guess this makes us both right (or both wrong :-) ) - it looks like pointer handling is "hardware-assisted software". Alexei Pytel From: Alexei Pytel <pytel@us.ibm.com> > > 2) the tagged pointer protection is not hardware, but is done in > > software, so need not contribute to make memory more expensive. > > With all respect, the tagged pointer protection *is* hardware. > It could in theory be done by software, but it would incur unacceptable > overhead. > Well, the RISC code to check if a pointer is valid is: LQ R6, addr ; load pointer into R6, R7. set bit in exception reg if no tag TXER nn ; trap if no tag to me that is software. The trap can be disabled by replacing the TXER instruction by a NOOP. The overhead is the TXER instruction and is not unacceptable. _______________________________________________ This is the Midrange Systems Technical Discussion (MIDRANGE-L) mailing list To post a message email: MIDRANGE-L@midrange.com To subscribe, unsubscribe, or change list options, visit: http://lists.midrange.com/cgi-bin/listinfo/midrange-l or email: MIDRANGE-L-request@midrange.com Before posting, please take a moment to review the archives at http://archive.midrange.com/midrange-l.
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