Re: Odd RPG question, which method are programs (RPG and others) stored on the i?

Chris:

This appears to be a question about IBM's PowerPC processor (hardware) architecture, and not so much "IBM i" (OS), as "von Neumann" vs. "Harvard" architecture is usually described as an attribute of the actual hardware design of the processor (CPU) architecture.

IBM PowerPC architecture is a "von Neumann" architecture computer since all programs are stored in main memory, just like any other data. However, like most modern processors (Intel x86, etc.), PowerPCalso has some of the characteristics of a "Harvard architecture" when you consider protection bits added to page tables to prevent execution of data as if it was code, to prevent altering code "on the fly" by (possibly errant or malicious) programs (e.g. a "viruses"). Once executable code is loaded into memory and the page protection bits are set to "Execute" permission for those pages, the PowerPC system behaves more like a "Harvard" architecture. This page-level "execute" permission bit has been in IBM PowerPC architecture since at least POWER4. (For PowerPC this bit is called "No Execute" -- when set to "1" for a page, prevents execution of any code from that page; set to "0" allows execution of code in that page.)

PowerPC processors also have some instruction pre-fetching and/or "pipelining" and this tends to prohibit (or render unpredictable) another "hallmark" of "von Neumann" architecture -- so-called "self-modifying" code. Back in the early days of computing, computer architectures and instruction sets were quite primitive, compared to modern processors, so, it was necessary to have programs that altered their own instructions "on-the-fly" to perform certain tasks. (A "bad idea" that has been abandoned, if not completely banished,//from modern processor designs.)

As for "IBM i" or OS/400 Machine Interface (MI) or TIMI ("Technology Independent Machine Interface"), as a "virtual machine" architecture, it is rather more like "Harvard" architecture, as there is no (documented or supported) mechanism for a program to directly access or alter the actual PowerPC RISC instructions, because MI instructions get translated into actual hardware instructions of the underlying processor by the "trusted translator" component of the SLIC kernel (aka, "OX" the Optimizing Translator). PowerPC RISC instructions are "encapsulated" within program objects and are not directly visible or accessible to programs running on IBM i or OS/400. So, in this way, one might say that OS/400 (or IBM i) is more like "Harvard" architecture (at least, conceptually).

SUMMARY
Modern processors are not strictly "von Neumann" or "Harvard" architecture, but they often have some characteristics of both (hybrid).

Hope that helps,

Mark S. Waterbury

> On 6/10/2015 4:20 PM, Chris Holko wrote:

Does the i use the Harvard architecture or von Neumann style for storing programs? This might be too esoteric for the list but considering some of the members on the list I am hoping to understand

For those unfamiliar,https://en.wikipedia.org/wiki/Harvard_architecture