to clarify even more:

The SLIC kernel is written directly in C++ and uses an IBM C++
compiler that directly generates PowerPC RISC instructions.

Most of OS/400 is written to run "on top of" the MI layer provided
by SLIC, but this does not mean that it is "written in MI"...

1. the PL/MI compiler directly generates a binary MI template;
2. other IBM compilers/languages generate OPM MI;
3. still other IBM languages and compilers may generate W-Code,
    which is then translated into "New MI" (NMI), and so on...

All of these "intermediate" forms are then translated into the actual
machine language, for the IMPI instruction set for CISC AS/400s,
or PowerPC RISC instructions for newer AS/400e and iSeries.

If one wanted to "emulate MI", one would need to "emulate" this
instruction set (either IMPI, or PowerPC), to run the OS/400 code,
as IBM does not ship OS/400 with "observable" MI templates.

What was formerly called "vertical microcode" on the IMPI CISC
AS/400s was re-written, and  this was pretty much of a "total" 
re-write of what is now known as SLIC, in C++, from the ugly 
old PL/MP (PL/S for IMPI) code base...

But, IBM has still never re-designed or re-wrote the vast "bulk" of
the parts of OS/400 that we think of as "OS/400" that sits above
the "single level storage" model provided by the MI layer... and that
creates OS/400 "objects" out of (one or more) MI objects...

In fact, it appears that, for quite a while, they actually continued to
use the PL/MI compiler that directly generated binary MI templates,
and then used the so-called "magic" translator to translate that into
actual NMI, to produce the executable PowerPC RISC code.

There are even rumors that IBM ToroLabs has in fact now
created a PL/S compiler that directly generates W-Code, and so,
now IBM Rochester has a PL/MI dialect that directly produces the
W-Code, which then gets translated into NMI, etc. ... so, they have
a slightly more "modern" code base to work from... the main benefit
of this is that they probably now can do 100% of all development on
AIX RS/6000 er, pSeries workstations, rather than having to resort
to using VM/CMS for the old PL/MI compiler... 

But a vast amount of existing code is still maintained in PL/MI.
The SLIC and hypervisor layers are, of course, not written to the
MI specification, so the "short" answer is still that it will be very
difficult to "emulate MI" on Intel if you mean by that to recreate
the evironment in which a "normal" user program runs.

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