instruction pointers -- MI400

× The internal search function is temporarily non-functional. The current search engine is no longer viable and we are researching alternatives.
As a stop gap measure, we are using Google's custom search engine service.
If you know of an easy to use, open source, search engine ... please contact support@midrange.com.

Instruction pointers are a bit limited in mi.

You cannot add to them or setip to a variable label name.

This limits the error recovery ability of a pgm. Implementing "Ignore/Retry/Cancel" as a reply to an unmonitored escape msg is tough to do. Also makes it hard for a debugger to implement "skip an instruction" functionality.

I am looking at the risc code of an mi pgm. Here are some branching examples.

Branch to label.

B label1 ;

Risc code:

B 0X18 02D

Branch to instruction pointer

B pLbl ;

Risc code:

   LQ 26,0XF2E0(31),2                    032
   BCLA 12,21,0X8020
   LD 3,0X1B0(28)
   TXER 0,0,42
   LD 2,0X0(27)
   LD 0,0X8(27)
   MTSPR 9,2
   TD 24,3,0
   BCCTR 20,0

BCCTR is "branch conditional to the address contained in the counter register".

It looks like the risc instructions do allow the branching to a variable instruction number. no?

Is the counter register 64 bits?

Does the powerpc risc have the ability to branch to code in another pgm? Like a branch to an OMI implemented module of code?

Thanks,

Steve Richter

This mailing list archive is Copyright 1997-2024 by midrange.com and David Gibbs as a compilation work. Use of the archive is restricted to research of a business or technical nature. Any other uses are prohibited. Full details are available on our policy page. If you have questions about this, please contact [javascript protected email address].

Operating expenses for this site are earned using the Amazon Associate program and Google Adsense.