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  2. MI400
  3. February 2005

Re: LQ and SELRI PowerPC instruction questions

By the way, for further insight into the SELxx instructions, look at the
following RISC disassembly on V5R3 of the procedure "llabs" in module
"QC2ABS" in service program "QSYS/QC2UTIL2".  This little procedure simply
receives a values in GPR4 and returns its absolute value in GPR3:

CMPI 0,1,4,0
NEG 0,4
SELRR 0,0,4,36
ORI 3,0,0
BCLR 20,0

Here it appears that AS/400 exception bit "36" is a copy of a standard
PowerPC bit in condition register 0 (Positive, Negative, or Zero).

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